https://www.nas.nasa.gov/hecc/support/kb/105/ https://www.nas.nasa.gov/hecc/support/kb/programming-for-nvidia-gpus_647.html UPDATE IN PROGRESS: On August 24, 2026, the Skylake/V100 and Cascade Lake/V100 nodes were decommissioned from the Cabeus supercomputer. This article is currently undergoing updates to reflect the changes in the NAS environment and may not accurately... Porting/Building Code/Compiling Wed, 02 Sep 2026 16:50:39 -0700 https://www.nas.nasa.gov/hecc/support/kb/using-cray-message-passing-toolkit-on-athena_717.html Cray Message Passing Toolkit (CMPT) is a collection of high-performance software libraries within the Cray Programming Environment (CPE) that enables parallel applications to communicate and exchange data efficiently across nodes in a Cray system... Porting/Building Code/MPI Libraries Tue, 17 Feb 2026 14:50:03 -0800 https://www.nas.nasa.gov/hecc/support/kb/recommended-intel-compiler-options_99.html Intel compilers are recommended for building your applications on HECC systems with Intel x86-64 CPUs. There is no default compiler—you must load a specific module. To see what modules are available, run the module avail command: pfe21% module... Porting/Building Code/Compiling Wed, 14 Jan 2026 09:26:11 -0800 https://www.nas.nasa.gov/hecc/support/kb/using-intel-advisor-for-better-threading-and-vectorization_566.html You can use Intel Advisor to identify issues and help you with threading and vectorization optimization on the specific Intel processors that your Fortran, C, or C++ applications run on. The software, which is available as a module on HECC systems,... Porting/Building Code/Optimizing/Troubleshooting/Performance Analysis Tue, 13 Jan 2026 16:58:56 -0800 https://www.nas.nasa.gov/hecc/support/kb/hyperthreading_488.html Hyperthreading is available and enabled on the Aitken and Electra compute nodes. With hyperthreading, each physical core can function as two logical processors. This means that the operating system can assign two threads per core by assigning one... Porting/Building Code/Optimizing/Troubleshooting/Process/Thread Pinning Tue, 13 Jan 2026 16:49:13 -0800 https://www.nas.nasa.gov/hecc/support/kb/amd-aocc-compiler_691.html The AMD Optimizing C/C++ and Fortran Compiler (AOCC) is highly optimized for x86 targets, especially for AMD Zen architecture-based processors. AOCC leverages LLVM, a project that includes a collection of modular and reusable compiler and... Porting/Building Code/Compiling Tue, 13 Jan 2026 12:27:15 -0800 https://www.nas.nasa.gov/hecc/support/kb/finding-hotspots-in-your-code-with-the-intel-vtune-command-line-interface_506.html The Intel VTune Profiler (renamed from Amplifier starting with 2020.0 version) is an analysis and tuning tool that provides predefined analysis configurations to address various performance questions. Among them, the hotspots analysis type can help... Porting/Building Code/Optimizing/Troubleshooting/Performance Analysis Wed, 31 Dec 2025 16:39:23 -0800 https://www.nas.nasa.gov/hecc/support/kb/using-hpe-mpt-environment-variables-for-pinning_286.html For MPI codes built with HPE's MPT libraries, one way to control pinning is to set certain MPT memory placement environment variables. For an introduction to pinning at NAS, see Process/Thread Pinning Overview. MPT Environment Variables Here are... Porting/Building Code/Optimizing/Troubleshooting/Process/Thread Pinning Wed, 31 Dec 2025 16:28:26 -0800 https://www.nas.nasa.gov/hecc/support/kb/using-intel-openmp-thread-affinity-for-pinning_285.html The Intel compiler's OpenMP runtime library has the ability to bind OpenMP threads to physical processing units. Depending on the system topology, application, and operating system, thread affinity can have a dramatic effect on code performance. We... Porting/Building Code/Optimizing/Troubleshooting/Process/Thread Pinning Wed, 31 Dec 2025 16:26:28 -0800 https://www.nas.nasa.gov/hecc/support/kb/processthread-pinning-overview_259.html Pinning, the binding of a process or thread to a specific core, can improve the performance of your code by increasing the percentage of local memory accesses. Once your code runs and produces correct results on a system, the next step is... Porting/Building Code/Optimizing/Troubleshooting/Process/Thread Pinning Wed, 31 Dec 2025 16:19:12 -0800 https://www.nas.nasa.gov/hecc/support/kb/porting-with-hpes-mpi-and-intel-openmp_104.html Building Applications To build an MPI/OpenMP hybrid executable using HPE's MPT and Intel's OpenMP libraries, you must compile your code with the -openmp flag and link it with the -lmpi flag. For example: %module load comp-intel/ mpi-hpe/mpt... Porting/Building Code/Porting to NAS Systems Wed, 31 Dec 2025 13:48:17 -0800 https://www.nas.nasa.gov/hecc/support/kb/porting-with-openmp_103.html Building Applications To build an OpenMP application, you need to use the -qopenmp Intel compiler flag: %module load comp-intel %ifort -o your_executable -qopenmp program.f Running Applications The maximum number of OpenMP threads that an... Porting/Building Code/Porting to NAS Systems Wed, 31 Dec 2025 13:45:24 -0800 https://www.nas.nasa.gov/hecc/support/kb/porting-with-hpe-mpt_100.html Among the Message Passing Interface (MPI) libraries installed on Aitken, Electra, and Endeavour, we recommend using HPE's Message Passing Toolkit (MPT) library. Use the command module avail mpi-hpe to determine which MPT versions are available. You... Porting/Building Code/Porting to NAS Systems Wed, 31 Dec 2025 13:43:19 -0800 https://www.nas.nasa.gov/hecc/support/kb/totalview_95.html TotalView is a GUI-based debugging tool that provides control over processes and thread execution, as well as visibility into program state and variables, for C, C++ and Fortran applications. It also provides memory debugging to detect errors such... Porting/Building Code/Optimizing/Troubleshooting/Debugging Wed, 31 Dec 2025 13:39:06 -0800